• DocumentCode
    1039966
  • Title

    A real-time video signal processor suitable for motion picture coding applications

  • Author

    Tamitani, Ichiro ; Harasaki, Hidenobu ; Nishitani, Takao ; Endo, Yukio ; Yamashina, Masakazu ; Enomoto, Tadayoshi

  • Author_Institution
    NEC Corp., Kawasaki, Japan
  • Volume
    36
  • Issue
    10
  • fYear
    1989
  • fDate
    10/1/1989 12:00:00 AM
  • Firstpage
    1259
  • Lastpage
    1266
  • Abstract
    A real-time video signal processor (VSP) system has been developed. The system employs three multiprocessor clusters, each of which has 12 video signal processor modules (VSPMs). A VSPM in a cluster processes its assigned subimage by using an overlap-save technique. Each cluster uses the same multiprocessor structure, in which homogeneous processor modules are connected to input, output, and feedback buses in parallel and two bus switch units. By controlling these units, the clusters can be combined in pipeline and/or parallel forms. Each cluster also uses a variable delay unit which achieves up to one frame delay on the feedback bus. By using this unit, interframe processing can be carried out without using internal data memories in VSPMs for the frame delay. The employment of the bus switches and the variable delay unit increases flexibility for a variety of signal processing algorithms. The system performs 500 million operations per second and is currently used as a real-time evaluation system for low-bit-rate picture encoders
  • Keywords
    computerised picture processing; encoding; parallel architectures; pipeline processing; real-time systems; signal processing equipment; telecommunications computing; video equipment; video signals; bus switches; homogeneous processor modules; image processing; interframe processing; low-bit-rate picture encoders; motion picture coding; multiprocessor clusters; overlap-save technique; parallel connection; pipeline; real-time evaluation system; variable delay unit; video signal processor; Delay; Employment; Motion pictures; Output feedback; Performance evaluation; Pipelines; Real time systems; Signal processing; Signal processing algorithms; Switches;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/31.44341
  • Filename
    44341