• DocumentCode
    1044710
  • Title

    MOS-bipolar monolithic integrated circuit technology

  • Author

    Polinsky, Murray ; Graf, Stephen

  • Author_Institution
    RCA Corporation, Somerville, N. J.
  • Volume
    20
  • Issue
    3
  • fYear
    1973
  • fDate
    3/1/1973 12:00:00 AM
  • Firstpage
    239
  • Lastpage
    244
  • Abstract
    A technique for the fabrication of p-channel MOS transistors and bipolar transistors within monolithic integrated circuits is described. Total process compatibility has been achieved without compromising either the n-p-n bipolar or p-channel MOS characteristics. The technology developed is similar to that used for conventional integrated circuits until the channel oxidation step, A low temperature oxidation followed by a high temperature anneal process that produces negligible changes in preceding diffusion profiles was used to form this oxide. Bias temperature tests of MOS capacitors have shown the oxide to be reproducibly free of contamination. A high slew rate MOS bipolar operational amplifier has been designed and fabricated on 0.045- by 0.045-in chip using the new technology. Typical characteristics are slew rate =80 V/µs voltage gain = 70 dB. The MOS transistors are used as active loads and level shifters in this circuit and provide a much improved frequency response over conventional circuits using p-n-p lateral transistors.
  • Keywords
    Annealing; Bipolar transistors; Circuit testing; Fabrication; Integrated circuit technology; MOS capacitors; MOSFETs; Monolithic integrated circuits; Oxidation; Temperature;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1973.17635
  • Filename
    1477292