Title :
A capacitance-based method for experimental determination of metallurgical channel length of submicron LDD MOSFETs
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fDate :
3/1/1994 12:00:00 AM
Abstract :
A capacitance based method for determining Lmet the metallurgical channel length of MOSFET, is proposed in this paper. This method has been extensively evaluated via two-dimensional numerical device simulation of MOSFETs with different source/drain tip and channel impurity concentration profiles as well as different gate oxide thicknesses. For all the impurity profiles tested, results demonstrated that the accuracy in extracting Lmet of MOSFETs with gate oxides thinner than 100 Å is better than 110 Å. This method is applicable even when there is significant source/drain reoxidation induced gate oxide thickening, as long as the gate oxide thickening is not extended into the region directly above the metallurgically defined channel region. Unlike the determination of Leff, the effective electrical channel length, from the drain current, Lmet is extracted from capacitance data and the extraction is free from complications that can be introduced by incomplete removal of the resistive effects associated with contacts and the lightly doped source/drain region. Extensive measurements were performed on MOSFETs of different technologies. It is shown that the measurement is accurately repeatable and no device stressing is experienced over the required bias range. The Lmet and Leff extracted from measured capacitance and drain current data are compared. Results showed that L met is typically 700 to 1200 Å shorter for submicron MOS technologies, but it tracks with Leff, i.e. a shorter L met corresponds to a shorter Leff
Keywords :
digital simulation; impurity distribution; insulated gate field effect transistors; length measurement; semiconductor device models; capacitance-based method; channel impurity concentration profiles; effective electrical channel length; gate oxide thicknesses; metallurgical channel length; resistive effects; source/drain reoxidation; source/drain tip concentration profiles; submicron LDD MOSFETs; two-dimensional numerical device simulation; Capacitance measurement; Contacts; Current measurement; Data mining; Impurities; MOSFET circuits; Numerical simulation; Performance evaluation; Stress measurement; Testing;
Journal_Title :
Electron Devices, IEEE Transactions on