Title :
Novel Offset-Gated Bottom Gate Poly-Si TFTs With a Combination Structure of Ultrathin Channel and Raised Source/Drain
Author :
Kang, Il-Suk ; Han, Shin-Hee ; Joo, Seung-Ki
Author_Institution :
Seoul Nat. Univ., Seoul
fDate :
3/1/2008 12:00:00 AM
Abstract :
We propose an offset-gated bottom gate polycrystalline silicon thin-film transistor (TFT), with a combination structure of ultrathin channel and raised source/drain, employing a simple process of the back surface exposure. It is experimentally and simulatively demonstrated that the new device has lower leakage current and better saturation characteristics, as compared with the conventional non offset TFT, due to the lateral electric field near the drain, which is reduced by the proposed structure. Moreover, the proposed TFT exhibits much better ON/OFF current ratio because the high current drive due to the raised source/drain structure is enough to compensate for the ON-state current reduction due to the offset-gate structure.
Keywords :
elemental semiconductors; leakage currents; semiconductor device testing; silicon; thin film transistors; ON-state current reduction; combination structure; leakage current; offset-gated bottom gate poly-silicon TFT; polycrystalline silicon; saturation characteristics; source-drain structure; thin-film transistor; ultrathin channel; Back surface exposure; electric field; offset gate; polycrystalline silicon thin-film transistor (poly-Si TFT); ultrathin channel and raised source/drain;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2008.915571