DocumentCode :
1054126
Title :
Simulation of Silicon Nanowire Transistors Using Boltzmann Transport Equation Under Relaxation Time Approximation
Author :
Jin, Seonghoon ; Tang, Ting-wei ; Fischetti, Massimo V.
Author_Institution :
Univ. of Massachusetts, Amherst
Volume :
55
Issue :
3
fYear :
2008
fDate :
3/1/2008 12:00:00 AM
Firstpage :
727
Lastpage :
736
Abstract :
An efficient approach for the simulation of electronic transport in nanoscale transistors is presented based on the multi-subband Boltzmann transport equation under the relaxation time approximation, which takes into account the effects of quantum confinement and quasi-ballistic transport. This approach is applied to the study of electronic transport in circular gate-all-around silicon nanowire transistors. Comparison with the nonequilibrium Green´s function method shows that the new method gives reasonably accurate terminal characteristics. We study the influence of silicon body diameter and gate length on the terminal current and subthreshold slope (SS). We have found that the calculated ON current is inversely proportional to the gate length to the power 1/2, and that the silicon body diameter should be smaller than roughly 2/3 of the channel length in order to maintain the SS within 80 mV/dec.
Keywords :
Boltzmann equation; MOSFET; approximation theory; ballistic transport; carrier relaxation time; electric current; elemental semiconductors; nanoelectronics; nanowires; relaxation theory; semiconductor device models; silicon; MOSFET scaling; Si; circular gate-all-around silicon nanowire transistors; electronic transport simulation; multisubband Boltzmann transport equation; quantum confinement effects; quasiballistic transport; relaxation time approximation; silicon body diameter; silicon gate length; subthreshold slope value; terminal current; Boltzmann equation; Electrons; Electrostatics; MOSFET circuits; Particle scattering; Potential well; Quantum mechanics; Silicon; Temperature; Transistors; Boltzmann transport equation (BTE); MOSFET scaling; electrostatic scaling length; gate-all-around (GAA); quasi-ballistic transport; relaxation time approximation (RTA); silicon nanowire transistors (SNWTs); subthreshold slope (SS); surrounding gate;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2007.913560
Filename :
4444641
Link To Document :
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