Title :
Continuous time common mode feedback technique for sub 1 V analogue circuits
Author :
Maymandi-Nejad, M. ; Sachdev, M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fDate :
11/7/2002 12:00:00 AM
Abstract :
A continuous time common mode feedback technique for sub 1 V analogue circuits using the bulk PMOS dynamic threshold (BP-DTMOS) technique is presented. The proposed method is used in a 0.8 V folded cascode amplifier in 0.18 μm CMOS technology. The schematic and the post-layout simulation results show that this technique is effective in reducing common mode errors caused by process or environmental variations. It also improves the CMRR of the amplifier.
Keywords :
CMOS analogue integrated circuits; circuit simulation; continuous time systems; differential amplifiers; feedback amplifiers; integrated circuit layout; low-power electronics; 0.18 micron; 0.8 V; CMOS technology; DC transfer characteristic; amplifier CMRR; bulk PMOS dynamic threshold technique; circuit simulation; common mode error reduction; continuous time common mode feedback technique; differential amplifier; environmental variations; folded cascode amplifier; folded cascode differential pair; post-layout simulation results; process variations; sub 1 V analogue circuits;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20021010
