• DocumentCode
    1056280
  • Title

    A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs

  • Author

    Kim, Suhwan ; Kosonocky, Stephen V. ; Knebel, Daniel R. ; Stawiasz, Kevin ; Papaefthymiou, Marios C.

  • Author_Institution
    Seoul Nat. Univ., Seoul
  • Volume
    54
  • Issue
    7
  • fYear
    2007
  • fDate
    7/1/2007 12:00:00 AM
  • Firstpage
    586
  • Lastpage
    590
  • Abstract
    Most existing power gating structures provide only one power-saving mode. We propose a novel power gating structure that supports both a cutoff mode and an intermediate power-saving and data-retaining mode. Experiments with test structures fabricated in 0.13-mum CMOS bulk technology show that our power gating structure yields an expanded design space with more power-performance tradeoff alternatives.
  • Keywords
    CMOS digital integrated circuits; integrated circuit design; low-power electronics; CMOS integrated circuits; cutoff mode; data-retaining mode; ground bounce noise; low-power electronics; multimode power gating; size 130 nm; CMOS technology; Leakage current; Logic circuits; Low voltage; MOS devices; MOSFETs; Power dissipation; Space technology; System-on-a-chip; Threshold voltage; Deep-submicrometer CMOS; ground bounce noise; low voltage; multi-threshold CMOS (MTCMOS);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2007.894428
  • Filename
    4273638
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1056280