Title :
A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode
Receiver
Author :
Wu, Chunlin ; Alon, Elad ; Nikolic, B.
Author_Institution :
Berkeley Wireless Res. Center, Berkeley, CA, USA
Abstract :
A wide-tuning-range low-power sigma-delta-based direct-RF-to-digital receiver architecture is implemented in 65 nm CMOS. A flat signal transfer function is chosen to support wide-frequency-range radios. A multilevel (two-bit) nonreturn-to-zero DAC improves jitter immunity to enable a high dynamic range, and, with a class-AB low-noise transconductance amplifier, guarantees a highly linear front end. For a 4 MHz signal, the peak SNDR of the receiver exceeds 68 dB and is better than 60 dB across the 400 MHz to 4 GHz carrier frequency range. By virtue of utilizing a negative feedback digitizer close to the antenna, an IIP3 of +10 dBm is achieved while dissipating only 40 mW from 1.1 V/1.5 V supply voltages.
Keywords :
CMOS integrated circuits; delta-sigma modulation; low noise amplifiers; low-power electronics; microwave receivers; operational amplifiers; radio receivers; transfer functions; CMOS technology; class-AB low-noise transconductance amplifier; direct RF-to-digital multimode ΔΣ receiver; flat signal transfer function; frequency 400 MHz to 4 GHz; jitter immunity; low-power sigma-delta receiver; multilevel nonreturn-to-zero DAC; negative feedback digitizer; power 40 mW; size 65 nm; voltage 1.1 V; voltage 1.5 V; wide-frequency-range radios; wide-tuning-range; Clocks; Dynamic range; Jitter; Optical signal processing; Receivers; Signal to noise ratio; $DeltaSigma$ ADC; ADC; CMOS; LNTA; bandpass ADC; receiver; software-defined radio;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2014.2319249