• DocumentCode
    1063545
  • Title

    Evaluation of a copper metallization process and the electrical characteristics of copper-interconnected quarter-micron CMOS

  • Author

    Awaya, Nobuyoshi ; Inokawa, Hiroshi ; Yamamoto, Eiichi ; Okazaki, Yukio ; Miyake, Masayasu ; Arita, Yoshinobu ; Kobayashi, Toshio

  • Author_Institution
    NTT LSI Labs., Kanagawa, Japan
  • Volume
    43
  • Issue
    8
  • fYear
    1996
  • fDate
    8/1/1996 12:00:00 AM
  • Firstpage
    1206
  • Lastpage
    1212
  • Abstract
    Copper metallization was applied to quarter-micron CMOS circuits using copper chemical vapor deposition (CVD) and chemical mechanical polishing (CMP). Both the metallization process and the electrical characteristics of CMOS devices/circuits were evaluated. Process-induced metal contamination on both sides of the wafer were quantitatively evaluated and reduced to about of 1011 atoms/cm2 by using an optimized cleaning sequence. The ability of borophosphosilicate-glass (BPSG) to act as a copper diffusion barrier was discovered and the ability of TiN to do so was also confirmed. Electrical characteristics of n and p MOSFET´s with copper interconnections were stable even after annealing at 550°C. The leakage current of the pn junction, capacitance-voltage characteristics and time-dependent dielectric breakdown characteristics of the MOS diode indicate that the copper metallization process did not deteriorate the pn junction and the gate oxide. Normal operation of a 53-stage quarter-micron CMOS inverter ring oscillator with copper metallization was successfully achieved
  • Keywords
    CMOS integrated circuits; MOSFET; annealing; capacitance; chemical vapour deposition; copper; diffusion barriers; electric breakdown; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; polishing; surface cleaning; 0.25 mum; 550 C; B2O3-P2O5-SiO2; BPSG; BPSG diffusion barrier; CMOS devices; CMOS inverter ring oscillator; Cu; Cu interconnection; Cu metallization process; MOS diode; TiN; TiN diffusion barrier; annealing; borophosphosilicate-glass; capacitance-voltage characteristics; chemical mechanical polishing; chemical vapor deposition; electrical characteristics; gate oxide; leakage current; nMOSFET; optimized cleaning sequence; pMOSFET; pn junction; process-induced metal contamination; quarter-micron CMOS circuits; time-dependent dielectric breakdown characteristics; Atomic layer deposition; CMOS process; Chemical vapor deposition; Circuits; Cleaning; Contamination; Copper; Electric variables; Metallization; Tin;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.506770
  • Filename
    506770