DocumentCode :
1067990
Title :
Optimizing Scheduling and Intercluster Connection for Application-Specific DSP Processors
Author :
Xu, Cathy Qun ; Xue, Chun Jason ; Hu, Jingtong ; Sha, Edwin Hsing-Mean
Author_Institution :
Dept. of Comput. Sci., Univ. of Texas at Dallas, Richardson, TX, USA
Volume :
57
Issue :
11
fYear :
2009
Firstpage :
4538
Lastpage :
4547
Abstract :
Signal processing applications have high instruction level parallelism (ILP) and real-time performance requirements. Embedded and application specific multicluster architecture is desirable to provide the large computation power that these applications need. As technology moves to deep submicron level, it becomes more important and challenging to design an efficient intercluster connection network to satisfy the rapid growing intercluster data transfer needs under the power and cost constraints. This paper addresses the automatic generation of intercluster connection network with partially connected buses. An application specific approach is proposed in this paper to determine the minimum number of required partially connected buses without performance degradation for a given schedule in polynomial time. The intercluster connection topology is then generated with the determined minimum number of partially connected buses to minimize the connection bus segments. Further, a scheduling algorithm is presented in this paper to minimize the intercluster communication needs for the given application and to reduce the minimum number of partially connected buses required in the intercluster connection network under schedule length constraint. Experimental results indicate that an average reduction up to 50.6% in the number of minimum required buses and an average reduction of 64.5% in bus segments can be achieved compared to commonly used intercluster communication aware scheduling techniques and as soon as possible (ASAP) data transfer scheme.
Keywords :
computational complexity; digital signal processing chips; scheduling; application specific multicluster architecture; application-specific DSP processors; instruction level parallelism; intercluster connection network; intercluster connection optimisation; intercluster data transfer; polynomial time; scheduling optimisation; signal processing applications; Architecture; clustered processors; data path synthesis; intercluster connection network;
fLanguage :
English
Journal_Title :
Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1053-587X
Type :
jour
DOI :
10.1109/TSP.2009.2024870
Filename :
5071167
Link To Document :
بازگشت