A CMOS digitally programmable slew-rate operational amplifier

Author

Yoon, Kwang S.

Author_Institution

Dept. of Electron. Eng., Inha Univ., Inchon, South Korea

Volume

42

Issue

11

fYear

1995

fDate

11/1/1995 12:00:00 AM

Firstpage

738

Lastpage

741

Abstract

A design methodology to program the slew rate of an operational amplifier (op-amp) is proposed. The designed amplifier fabricated by a 1.0 μm single-poly double-metal twin-well CMOS process is capable of providing a programmable extra bias current which can be linearly controlled by an external 4-b digital signal. The experimental results showed that the slew rate and power dissipation of the designed amplifier were linearly controlled from 5 V/μs to 40 V/μs and from 1.1 mW to 4.0 mW for a ±4 V power supply, respectively

Keywords

CMOS analogue integrated circuits; integrated circuit design; operational amplifiers; -4 to 4 V; 1 mum; 1.1 to 4 mW; CMOS digitally programmable slew-rate operational amplifier; design methodology; digital signal control; linear control; power dissipation; programmable extra bias current; single-poly double-metal twin-well CMOS process; slew rate programmability; Analog circuits; CMOS process; Design methodology; Operational amplifiers; Power amplifiers; Power dissipation; Power supplies; Signal design; Signal processing; Switching circuits;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.475255

Filename

475255