Title :
GND Plugs: A Superior Technology to Mitigate TSV-Induced Substrate Noise
Author :
Khan, Naiad Hossain ; Alam, Syed M. ; Hassoun, Soha
Author_Institution :
Comput. Sci. Dept., Tufts Univ., Medford, MA, USA
Abstract :
Through-silicon vias (TSVs) contribute to substrate noise in 3-D ICs, causing performance degradation of neighboring active devices and requiring keep-out zones. To mitigate TSV-induced substrate noise, we propose a new device, the ground (GND) plug, a TSV-like structure that connects to the ground and extends partially or completely through the substrate. We propose two types of GND plugs: a “front-side” plug, connecting to local interconnect of the same die, and a “back-side” plug, connecting to the GND from the substrate side of the die. We perform comprehensive analyses to evaluate the performance of GND plugs for two substrate types, a high-R bulk and a bulk with epitaxial layer. We compare the GND plug technique with existing noise mitigation techniques: a thicker dielectric liner, a guard ring, and a back-side ground plane. When compared with increased dielectric thickness, the front-side GND plug offers a relative 33% area reduction and allows a significantly reduced keep-out zone. The GND plug offers a more practical noise isolation approach than using a back-side ground plane. Our study demonstrates that the GND plug is a superior technology, effective in mitigating TSV-induced substrate noise by an order of magnitude when compared to the other techniques. The back-side GND plug does not compete with active devices for silicon area yet reduces substrate noise significantly.
Keywords :
earthing; electric connectors; epitaxial layers; integrated circuit interconnections; integrated circuit noise; performance evaluation; three-dimensional integrated circuits; 3D IC; TSV-induced substrate noise mitigation; back-side ground plane; back-side ground plug; bulk epitaxial layer substrate; die interconnection; dielectric liner; dielectric thickness; front-side GND plug technique; guard ring; high-R bulk substrate; noise isolation approach; through-silicon vias; 3-D integrated circuits; integrated circuit noise; through silicon via;
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
DOI :
10.1109/TCPMT.2013.2241178