• DocumentCode
    1079233
  • Title

    Fabrication of high-performance LDDFET´s with Oxide sidewall-spacer technology

  • Author

    Tsang, Paul J. ; Ogura, Seiki ; Walker, William W. ; Shepard, Joseph F. ; Critchlow, Dale L.

  • Author_Institution
    IBM General Technology Division, Hopewell Junction, NY
  • Volume
    29
  • Issue
    4
  • fYear
    1982
  • fDate
    4/1/1982 12:00:00 AM
  • Firstpage
    590
  • Lastpage
    596
  • Abstract
    A fabrication process for the Lightly Doped Drain/Source Field-Effect Transistor, LDDFET, that utilizes RIE produced SiO2sidewall spacers is described. The process is compatible with most conventional polysilicon-gated FET processes and needs no additional photomasking steps. Excellent control and reproducibility of the n-region of the LDD device are obtained. Measurements from dynamic clock generators have shown that LDDFET´s have as much as 1.9X performance advantage over conventional devices.
  • Keywords
    Circuit optimization; Clocks; Etching; FETs; Fabrication; Integrated circuit measurements; Reproducibility of results; Silicon; Space technology; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1982.20748
  • Filename
    1482245
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1079233