Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin Channel

Author

Hung-Bin Chen ; Chun-Yen Chang ; Nan-Heng Lu ; Jia-Jiun Wu ; Ming-Hung Han ; Ya-Chi Cheng ; Yung-Chun Wu

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

34

Issue

7

fYear

2013

fDate

Jul-13

Firstpage

897

Lastpage

899

Abstract

This letter demonstrates for the first time junctionless (JL) gate-all-around (GAA) poly-Si thin-film transistors (TFTs) with ultrathin channels (2 nm). The subthreshold swing is 61 mV/decade and the ON/OFF current ratio is close to 10⁸ because of the excellent gate controllability and ultrathin channel. The JL-GAA TFTs have a low drain-induced barrier lowering value of 6 mV/V, indicating greater suppression of the short-channel effect than in JL-planar TFTs. The cumulative distribution of electrical parameters in JL-GAA is small. Therefore, the proposed JL-GAA TFTs of excellent device characteristics along with simple fabrication are highly promising for future system-on-panel and system-on-chip applications.

Keywords

elemental semiconductors; silicon; thin film transistors; Si; drain-induced barrier lowering value; gate controllability; gate-all-around junctionless poly-Si TFT; short-channel effect; subthreshold swing; thin-film transistors; ultrathin channel; Gate-all-around (GAA); junctionless (JL); thin-film transistor; ultrathin channel;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2013.2262018

Filename

6541960