Title :
A Flexible Multichannel EEG Feature Extractor and Classifier for Seizure Detection
Author :
Page, Adam ; Sagedy, Chris ; Smith, Emily ; Attaran, Nasrin ; Oates, Tim ; Mohsenin, Tinoosh
Author_Institution :
Univ. of Maryland, Baltimore, MD, USA
Abstract :
This brief presents a low-power, flexible, and multichannel electroencephalography (EEG) feature extractor and classifier for the purpose of personalized seizure detection. Various features and classifiers were explored with the goal of maximizing detection accuracy while minimizing power, area, and latency. Additionally, algorithmic and hardware optimizations were identified to further improve performance. The classifiers studied include $k$-nearest neighbor, support vector machines, naïve Bayes, and logistic regression (LR) . All feature and classifier pairs were able to obtain F1 scores over 80% and onset sensitivity of 100% when tested on ten patients. A fully flexible hardware system was implemented that offers parameters for the number of EEG channels, the number of features, the classifier type, and various word width resolutions. Five seizure detection processors with different classifiers have been fully placed and routed on a Virtex-5 field-programmable gate array and been compared. It was found that five features per channel with LR proved to be the best solution for the application of personalized seizure detection. LR had the best average F1 score of 91%, the smallest area and power footprint, and the lowest latency. The ASIC implementation of the same combination in 65-nm CMOS shows that the processor occupies 0.008 mm2 and dissipates 19 nJ at 484 Hz.
Keywords :
1/f noise; Bayes methods; CMOS integrated circuits; application specific integrated circuits; biomedical electronics; electroencephalography; feature extraction; field programmable gate arrays; low-power electronics; medical disorders; medical signal processing; minimisation; neurophysiology; regression analysis; support vector machines; ASIC implementation; CMOS; EEG channels; F1 scores; Virtex-5 field-programmable gate array; algorithmic optimizations; area minimization; classifier type; detection accuracy maximization; flexible electroencephalography feature extractor; flexible multichannel EEG feature classifier; flexible multichannel EEG feature extractor; frequency 484 Hz; fully flexible hardware system; hardware optimizations; k-nearest neighbor; latency minimization; logistic regression; low-power electroencephalography feature extractor; multichannel electroencephalography feature extractor; naive Bayes; onset sensitivity; personalized seizure detection; power minimization; seizure detection processors; size 65 nm; support vector machines; word width resolutions; Accuracy; Feature extraction; Field programmable gate arrays; Logistics; Sensitivity; Support vector machines; Training; $k$-nearest neighbor (KNN); ASIC; EEG; FPGA; KNN; Personalized seizure detection; SVM; electroencephalography (EEG); field-programmable gate array (FPGA); logistic regression; logistic regression (LR); low power; naïve Bayes; na??ve Bayes (NB); personalized seizure detection; support vector machines (SVMs);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2014.2385211