Title :
A simple method for extracting average doping concentration in the polysilicon and silicon surface layer near the oxide in polysilicon-gate MOS structures
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
The author demonstrates a simple technique that extracts average doping concentration in the polysilicon and silicon near the oxide in a metal/polysilicon/oxide/silicon system. The technique is based on the maximum-minimum capacitance method on two large area structures/spl minus/one MOSFET and one MOSC (MOS capacitor). The technique is simple and reliable since only three data points in the C-V data are required/spl minus/two points in MOSC C-V and one point in MOSFET C-V. The technique avoids inaccuracy caused by interface traps at the polysilicon/oxide and the oxide/silicon interface. The technique can be implemented into fab routine electric-test procedures for simultaneously monitoring change of doping concentration in polysilicon and silicon during process development.<>
Keywords :
capacitance measurement; doping profiles; elemental semiconductors; insulated gate field effect transistors; metal-insulator-semiconductor devices; metal-insulator-semiconductor structures; semiconductor device testing; semiconductor-insulator boundaries; silicon; C-V data; MOS capacitor; MOSFET; Si surface layer; Si-SiO/sub 2/; average doping concentration; fab routine electric-test procedures; interface traps; maximum-minimum capacitance method; metal/polysilicon/oxide/Si system; monitoring; oxide/Si interface; polycrystalline Si; polysilicon; polysilicon-gate MOS structures; polysilicon/oxide interface; CMOS technology; Capacitance measurement; Capacitance-voltage characteristics; Doping; Frequency measurement; MOSFET circuits; Monitoring; Silicon; Substrates; Voltage;
Journal_Title :
Electron Device Letters, IEEE