Title :
Tracking Uncertainty with Probabilistic Logic Circuit Testing
Author :
Krishnaswamy, Smita ; Markov, Igor L. ; Hayes, John P.
Author_Institution :
Univ. of Michigan, Ann Arbor
Abstract :
The diverse nature of the faults and defects that may occur at nanoscale ranges necessitates new techniques for ATPG. This article proposes an efficient technique that relies on a probabilistic approach to detect and diagnose nontraditional faults and defects.
Keywords :
VLSI; automatic test pattern generation; fault diagnosis; logic testing; ATPG; VLSI; defect detection; diagnose nontraditional faults and defects; fault detection; nanotechnology; probabilistic logic circuit testing; uncertainty tracking; Circuit faults; Circuit testing; Crosstalk; Delay; Nanoscale devices; Probabilistic logic; Single event upset; Threshold voltage; Uncertainty; Very large scale integration; fault-modeling framework; integer linear programming; logic circuit testing; probabilistic faults; test-vector sensitivity;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2007.146
