DocumentCode
1104784
Title
A 9-GHz frequency divider using Si bipolar super self-aligned process technology
Author
Suzuki, M. ; Hagimoto, K. ; Ichino, H. ; Konaka, S.
Author_Institution
Nippon Telegraph and Telephone Public Corporation, Atsugi-shi, Kanagawa, Japan
Volume
6
Issue
4
fYear
1985
fDate
4/1/1985 12:00:00 AM
Firstpage
181
Lastpage
183
Abstract
A very high-speed 1/8 frequency divider is fabricated, using Si bipolar super self-aligned process technology (SST), and tested. The circuit consists of three T-connected D-type master-slave flip-flops and buffers. A low voltage swing (225 mV) differential circuit technique is adopted for the first stage T-type flip-flop. The divider is capable of operating at up to 9 GHz with a power dissipation of 554 mW.
Keywords
Circuits; Flip-flops; Frequency conversion; Low voltage; Master-slave; Space technology; Telegraphy; Telephony; Threshold voltage; Transconductance;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1985.26089
Filename
1485242
Link To Document