• DocumentCode
    1105708
  • Title

    Low-power and high-performance equality comparator using pseudo-NMOS NAND gates

  • Author

    Kim, C.-Y. ; Kim, L.-S.

  • Author_Institution
    Dept. of EECS, KAIST, Daejeon, South Korea
  • Volume
    40
  • Issue
    18
  • fYear
    2004
  • Firstpage
    1100
  • Lastpage
    1101
  • Abstract
    An equality comparator (EC), which exploits the fact that unequal cases happen more frequently in compare operations, is proposed. It is composed of conditional pseudo-NMOS NAND gates to save the power of the unused sub-ECs. The proposed 64-bit EC results in 31% faster speed and 42% less power dissipation than the conventional dynamic EC.
  • Keywords
    CMOS logic circuits; comparators (circuits); high-speed integrated circuits; low-power electronics; 64 bit; conditional pseudoNMOS NAND gates; high performance equality comparator; low power equality comparator; power dissipation; power saving;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20045453
  • Filename
    1334995
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1105708