• DocumentCode
    1106868
  • Title

    On the Design of Minimum Length Fault Tests for Combinational Circuits

  • Author

    Bearnson, L.W. ; Carroll, Chester C.

  • Author_Institution
    IEEE
  • Issue
    11
  • fYear
    1971
  • Firstpage
    1353
  • Lastpage
    1356
  • Abstract
    Techniques for deriving the minimum length tests are developed for irredundant combinational circuits that contain single faults. The development is based on the Boolean difference function. The Boolean difference function is expanded to form two analytical expressions that can be used to calculate the tests for any stuck-at-zero and stuck-at-one fault within combinational circuits.
  • Keywords
    Error correction, fault detection, fault diagnosis.; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Equations; Fault detection; Fault diagnosis; Logic circuits; Logic testing; Missiles; Error correction, fault detection, fault diagnosis.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/T-C.1971.223137
  • Filename
    1671730
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1106868