Dynamic Self-Regulated Charge Pump With Improved Immunity to PVT Variations

Author

Bou-Sleiman, Sleiman ; Ismail, Mahamod

Author_Institution

Analog VLSI Lab., Ohio State Univ., Columbus, OH, USA

Volume

22

Issue

8

fYear

2014

fDate

Aug. 2014

Firstpage

1716

Lastpage

1726

Abstract

A charge pump (CP) design that simultaneously reduces current mismatch and sensitivity to process, voltage, and temperature variations is presented. The self-biased and self-regulated circuit uses a dual-feedback mechanism with a replica CP to dynamically stabilize and equalize the currents over a wide output voltage range under varying operating conditions. The circuit is further analyzed and designed in 90-nm CMOS. Extensive corner and Monte Carlo runs are used to verify its current matching capabilities as well as its stability and response within a phase locked loop. The CP achieves near perfect current matching for a wide output voltage range and for temperatures ranging from -30 °C to 90 °C and a power supply between 1.08 and 1.32 V.

Keywords

CMOS integrated circuits; Monte Carlo methods; charge pump circuits; phase locked loops; stability; CMOS; Monte Carlo runs; PVT variations; current mismatch; dual-feedback mechanism; dynamic self-regulated charge pump; improved immunity; phase locked loop; process variations; self-biased circuit; self-regulated circuit; size 90 nm; stability; temperature -30 degC to 90 degC; temperature variations; voltage 1.08 V to 1.32 V; voltage variations; Frequency synthesizers; Phase frequency detector; Phase locked loops; Switches; Transistors; Voltage control; Voltage-controlled oscillators; Charge pump (CP); frequency synthesizers; phase-locked loops (PLLs); phase-locked loops (PLLs).;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2013.2278375

Filename

6589018