DocumentCode
1111691
Title
GaAs ultra-high-frequency dividers with advanced SAINT FET´s
Author
Osafune, Kazuo ; Enoki, Takatomo ; Yamasaki, Kimiyoshi ; Ohwada, Kuniki
Author_Institution
NTT Electrical Communications Laboratories, Atsugi-shi, Kanagawa Prefecture, Japan
Volume
33
Issue
12
fYear
1986
fDate
12/1/1986 12:00:00 AM
Firstpage
2059
Lastpage
2063
Abstract
The circuit design, fabrication, and performance of ultra-high-frequency dividers with buffer FET logic (BFL) circuits are described. Using air-bridge technology and a new, self-aligned-gate, GaAs FET process, called advanced SAINT, which avoids excess gate metal overlap on the dielectric film, 10.6-GHz operation at 258 mW is achieved. This performance is made possible by a reduction of gate and interconnection parasitic capacitance. Furthermore, the possibility of operation above 20 GHz for GaAs MESFET frequency dividers is predicted on the basis of circuit optimization and FET improvements including parasitic capacitance reduction and transconductance enhancement.
Keywords
Circuit synthesis; Dielectric films; FETs; Fabrication; Gallium arsenide; Integrated circuit interconnections; Logic circuits; Logic design; MESFET circuits; Parasitic capacitance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1986.22868
Filename
1486085
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