Title :
On the Design of Logic Networks with Redundancy and Testability Considerations
Author :
Dandapani, Ramaswami ; Reddy, Sudhakar M.
Author_Institution :
Department of Engineering Technology, University of Iowa
Abstract :
The presence of redundancy in combinational networks increases the cardinality of the test set to detect all stuck-at-faults. A solution to this problem is to identify and remove all redundancies in the networks before deriving test sets. It is shown in this paper that the identification of redundancy in arbitrary combinational networks is an extremely tedious problem.
Keywords :
Combinational networks, logic design, prime trees, redundancy, stuck-at-faults, testing.; Algorithm design and analysis; Circuit faults; Circuit testing; Cities and towns; Digital circuits; Digital systems; Fault detection; Logic design; Logic testing; Redundancy; Combinational networks, logic design, prime trees, redundancy, stuck-at-faults, testing.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1974.223821
