Abstract :
Logic gates subject to asymmetric input faults may be made more reliable by employing redundant inputs. A mathematical expression for determining the optimum number of redundant inputs based on input reliabilities of the gate is developed. The development follows the theory of combinatorial probability.
Keywords :
Asymmetric input-faults, input redundancy, logic gate, probability, reliability.; Circuit faults; Circuits and systems; Digital systems; Fault tolerant systems; Integrated circuit reliability; Logic circuits; Logic design; Logic gates; Probabilistic logic; Redundancy; Asymmetric input-faults, input redundancy, logic gate, probability, reliability.;