DocumentCode :
1117360
Title :
Weighted Realizations of Switching Functions
Author :
Brown, Frank M.
Author_Institution :
Department of Electrical Engineering, University of Kentucky
Issue :
12
fYear :
1975
Firstpage :
1217
Lastpage :
1221
Abstract :
Any switching function has weighted representations, i.e., symmetric representations for which some of the arguments are repeated. We call a logic network based on such a representation a weighted realization. It is shown that a weighted realization may be implemented using a full-adder network (called a moment generator) whose outputs are fed to a multiplexer. A procedure is given to synthesize the full-adder network using the fewest possible modules and with strong coalescing of modules into multibit adders.
Keywords :
Binary adders, combinational logic, multiplexers, symmetric functions, tally-coded representations.; Adders; Binary codes; Circuits; Conductivity; Logic; Multiplexing; Network synthesis; Relays; Signal synthesis; Voltage; Binary adders, combinational logic, multiplexers, symmetric functions, tally-coded representations.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1975.224166
Filename :
1672759
Link To Document :
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