Title :
A self-aligned quarter-to-half-micrometer buried-gate GaAs junction FET
Author :
Lo, Y.H. ; Wang, Shyh ; Miller, J. ; Mars, D. ; Wang, Shih-Yuan
Author_Institution :
University of California, Berkeley, CA
fDate :
1/1/1987 12:00:00 AM
Abstract :
We present a reliable but simple self-aligned technology to fabricate very short buried-gate (0.25-0.5 µm) GaAs JFET. The device has a buried p-n junction gate to control the channel current, but in particular, there is another Schottky contact connecting with the source to define the real channel length. The transconductance is 180 mS/mm and the gate leakage current density is only about one-hundredth of the conventional MESFET. Furthermore, there is no backgate effect regardless of how close two devices are neighbored. This technology and device structure are especially useful in GaAs integrated circuits.
Keywords :
FETs; Gallium arsenide; Hysteresis; Leakage current; Lithography; MESFETs; Ohmic contacts; Resists; Threshold voltage; Transconductance;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1987.26542