Transient switching of the parasitic bipolar device of an epitaxial CMOS transistor

The turn-on delay time of the vertical parasitic bipolar device of a CMOS transistor after the application of a latch-up triggering signal to forward bias the n+ source junction was studied. We found that the delay time for the device on an epitaxial CMOS transistor is in the order of a few nanoseconds, which is much shorter than that on a nonepitaxial CMOS transistor.