• DocumentCode
    1122135
  • Title

    Code Compression for VLIW Embedded Systems Using a Self-Generating Table

  • Author

    Lin, Chang Hong ; Xie, Yuan ; Wolf, Wayne

  • Author_Institution
    Princeton Univ., Princeton
  • Volume
    15
  • Issue
    10
  • fYear
    2007
  • Firstpage
    1160
  • Lastpage
    1171
  • Abstract
    We propose a new class of methods for VLIW code compression using variable-sized branch blocks with self-generating tables. Code compression traditionally works on fixed-sized blocks with its efficiency limited by their small size. A branch block, a series of instructions between two consecutive possible branch targets, provides larger blocks for code compression. We compare three methods for compressing branch blocks: table-based, Lempel-Ziv-Welch (LZW)-based and selective code compression. Our approaches are fully adaptive and generate the coding table on-the-fly during compression and decompression. When encountering a branch target, the coding table is cleared to ensure correctness. Decompression requires a simple table lookup and updates the coding table when necessary. When decoding sequentially, the table-based method produces 4 bytes per iteration while the LZW-based methods provide 8 bytes peak and 1.82 bytes average decompression bandwidth. Compared to Huffman´s 1 byte and variable-to-fixed (V2F)´s 13-bit peak performance, our methods have higher decoding bandwidth and a comparable compression ratio. Parallel decompression could also be applied to our methods, which is more suitable for VLIW architectures.
  • Keywords
    data compression; decoding; embedded systems; multiprocessing systems; parallel architectures; Lempel-Ziv-Welch branch blocks; VLIW architectures; VLIW embedded system; decoding bandwidth; parallel decompression; selective code compression; self-generating table; table-based branch block; variable-sized branch blocks; Bandwidth; Costs; Embedded system; Instruments; Iterative decoding; Parallel processing; Reduced instruction set computing; System-on-a-chip; Table lookup; VLIW; Code compression; VLIW architecture;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2007.904097
  • Filename
    4303127