DocumentCode :
1124397
Title :
A regenerative comparator structure with integrated inductors
Author :
Park, Sunghyun ; Flynn, Michael P.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI
Volume :
53
Issue :
8
fYear :
2006
Firstpage :
1704
Lastpage :
1711
Abstract :
We employ on-chip inductors to improve the sampling speed and power consumption of regenerative comparators. Since these inductors are far smaller than those used in typical RF designs, the addition of inductors has little impact on area. Simulations based on accurate inductor models indicate more than a doubling of comparator sampling speed for a given power consumption, or a halving in power consumption for a given sampling speed. We present a detailed analysis of the new scheme. The technique is verified with test measurements of 16 comparators, implemented in 0.18-mum digital CMOS, sampling at 3.84 GHz
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); inductors; integrated circuit modelling; 0.18 micron; 3.84 GHz; comparator sampling speed; digital CMOS; flash analog-to-digital converter; inductor models; integrated inductors; monolithic inductor; on-chip inductors; power consumption; regenerative comparator; regenerative time constant; Analog-digital conversion; CMOS technology; Circuits; Clocks; Energy consumption; Inductors; Latches; Preamplifiers; Sampling methods; Transconductance; Flash analog-to-digital converter; monolithic inductor; regenerative comparator; regenerative time constant;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2006.879064
Filename :
1673640
Link To Document :
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