DocumentCode
1124707
Title
Recent advances in flip-chip underfill: materials, process, and reliability
Author
Zhang, Zhuqing ; Wong, C.P.
Author_Institution
Eng. & Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Volume
27
Issue
3
fYear
2004
Firstpage
515
Lastpage
524
Abstract
In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermomechanical stress created by the coefficient of thermal expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill resin and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process, and reliability in these packages is discussed.
Keywords
filler metals; flip-chip devices; integrated circuit interconnections; reliability; thermal stresses; capillary flow; flip-chip underfill; material design; molded underfill; no-flow underfill; organic board package; organic substrate; process development; silicon chip; thermal expansion coefficient; thermomechanical stress; underfill resin; wafer-level underfill; Dielectric substrates; Electronic packaging thermal management; Electronics packaging; Integrated circuit interconnections; Integrated circuit reliability; Materials reliability; Silicon; Soldering; Thermal expansion; Thermal stresses; Flip-chip; interconnect; materials; reliability; underfill;
fLanguage
English
Journal_Title
Advanced Packaging, IEEE Transactions on
Publisher
ieee
ISSN
1521-3323
Type
jour
DOI
10.1109/TADVP.2004.831870
Filename
1339451
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