Title :
Soft-spot analysis: targeting compound noise effects in nanometer circuits
Author :
Zhao, Chong ; Dey, Sujit ; Bai, Xiaoliang
Author_Institution :
California Univ., San Diego, CA, USA
Abstract :
Soft-spot analysis identifies regions in a circuit that are most susceptible to multiple noise sources and their compound effects so that designers can harden those spots for greater robustness. HSpice simulation validates the methodology´s quality, and demonstration on a commercial embedded processor shows its scalability.
Keywords :
SPICE; circuit complexity; circuit simulation; fault simulation; integrated circuit noise; integrated circuit reliability; integrated circuit testing; logic testing; nanotechnology; HSpice simulation; circuit design complexity; circuit noise; circuit simulation; embedded processor; fault simulation; integrated circuit reliability; nanometer circuits; robustness enhancement; soft-spot analysis; Circuit noise; Circuit simulation; Coupling circuits; Crosstalk; Information analysis; Interference; Noise robustness; Phase noise; Voltage; Working environment noise; B.7 Integrated Circuits; B.8.1 Reliability; G.4.g Reliability and robustness; Testing; and Fault-Tolerance;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2005.95
