DocumentCode
1130168
Title
WATSON: design space boundary exploration and model generation for analog and RFIC design
Author
De Smedt, Bart ; Gielen, Georges G E
Author_Institution
ESAT-MICAS Lab., Katholieke Universiteit Leuven, Belgium
Volume
22
Issue
2
fYear
2003
Firstpage
213
Lastpage
224
Abstract
A new method is described which gives the designer access to the design space boundaries of a circuit topology, all with transistor-level accuracy. Using multiobjective genetic optimization, the hypersurface of Pareto-optimal design points is calculated. Tradeoff analysis of competing performances at the design space boundaries is made possible by the application of multivariate regression techniques. This new methodology is illustrated with the presentation of the design space for two different types of circuits: a Miller-compensated operational transconductance amplifier and an LC-tank voltage-controlled oscillator.
Keywords
analogue integrated circuits; circuit CAD; circuit optimisation; integrated circuit design; integrated circuit modelling; network topology; operational amplifiers; radiofrequency integrated circuits; statistical analysis; voltage-controlled oscillators; CAD; EDA; LC-tank VCO; LC-tank voltage-controlled oscillator; Miller-compensated OTA; Pareto-optimal design points; RFIC design; WATSON; analog IC design; circuit synthesis; circuit topology; design automation; design space boundary exploration; hypersurface; model generation; multiobjective genetic optimization; multivariate regression techniques; operational transconductance amplifier; tradeoff analysis; transistor-level accuracy; Circuit topology; Design optimization; Genetics; Multivariate regression; Operational amplifiers; Performance analysis; Radiofrequency integrated circuits; Space exploration; Transconductance; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2002.806598
Filename
1174096
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