Title :
Boolean Network Probabilities and Network Design
Author :
McCluskey, E.J. ; Parker ; Shedletsky, John J.
Author_Institution :
Digital Systems Laboratory, Department of Computer Science and Electrical Engineering, Stanford University
Abstract :
The correspondence between Boolean network probabilities and the design formalisms of Ledley and Aiken is demonstrated.
Keywords :
Combinational circuits; fault detection; probabilistic testing; Circuit faults; Circuit testing; Electrical fault detection; Electrons; Fault detection; Fault diagnosis; Logic functions; Logic testing; Minimization; Notice of Violation; Combinational circuits; fault detection; probabilistic testing;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1978.1675058
