Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications

Author

Zhixin Wang ; Ruei-Cheng Sun ; Liou, Juin J. ; Don-Gey Liu

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA

Volume

61

Issue

7

fYear

2014

fDate

Jul-14

Firstpage

2588

Lastpage

2594

Abstract

In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is verified to provide bidirectional ESD protection performance superior to those reported in the literatures. Critical ESD parameters, such as the trigger voltage, holding voltage, and leakage current, can be flexibly adjusted via layout changes. With a low trigger voltage, a small ESD design window, a high robustness, and a small silicon area consumption, the PTBSCR is very suitable for low-voltage and low-power ESD protection applications.

Keywords

CMOS integrated circuits; electrostatic discharge; low-power electronics; thyristors; CMOS technology; PTBSCR; bidirectional protection performance; critical parameters; holding voltage; layout changes; leakage current; low-power protection applications; low-voltage ESD protection applications; pMOS-triggered bidirectional SCR; power-OFF conditions; power-ON conditions; silicon-controlled rectifier; size 0.18 mum; small silicon area consumption; trigger voltage; viable electrostatic discharge protection solution; Current measurement; Electrostatic discharges; Leakage currents; Logic gates; Robustness; Stress; Thyristors; Bidirectional protection; electrostatic discharge (ESD); pMOS-triggered; silicon-controlled rectifier (SCR); trigger voltage; trigger voltage.;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2014.2320827

Filename

6818402