DocumentCode :
1139574
Title :
An efficient BIST method for distributed small buffers
Author :
Jone, W.B. ; Huang, D.C. ; Wu, S.C. ; Lee, K.J.
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung-Cheng Univ., Chiayi, Taiwan
Volume :
10
Issue :
4
fYear :
2002
Firstpage :
512
Lastpage :
515
Abstract :
In this work, we propose a new built-in self-testing (BIST) method that is able to concurrently test a set of spatially distributed embedded-memory modules with different sizes. Using the concept of redundant read-write operations, we develop a new march method, called RSMarch, to efficiently test each memory module. The new method has the advantages of low hardware overhead, short test time, and high-fault coverage. The total test time is dominated by large-size modules. To further reduce the test time, we also propose a split-mode test method to virtually partition each large memory array into smaller modules, which can be tested simultaneously.
Keywords :
VLSI; buffer storage; built-in self test; integrated circuit testing; integrated memory circuits; logic testing; system-on-chip; BIST method; RSMarch; SOC testing; built-in self-testing; concurrent testing; distributed small buffers; high-fault coverage; low hardware overhead; march method; redundant read-write operations; serial interface technique; short test time; spatially distributed embedded-memory modules; split-mode test method; system on chip testing; Automatic testing; Built-in self-test; Circuit testing; Computer science; Hardware; Random access memory; Read-write memory; Sequential analysis; Size control; System testing;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2002.800532
Filename :
1177374
Link To Document :
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