DocumentCode :
1139777
Title :
Global and Modular Two´s Complement Cellular Array Multipliers
Author :
Kai Hwang
Author_Institution :
School of Electrical Engineering, Purdue University
Issue :
4
fYear :
1979
fDate :
4/1/1979 12:00:00 AM
Firstpage :
300
Lastpage :
306
Abstract :
Two new families of LSI iterative logic arrays are proposed to perform two´s complement multiplication based on the Baugh–Wooley algorithm [2]. The global approach is faster and attractive for LSI but limited in size due to current monolithic and packaging technology. The modular approach is better suited to realizing arbitrarily large array multipliers at only slight decrease in speed. The proposed additive multiply modules can be externally programmed by hardwiring to multiply binary numbers in either two´s complement or unsigned format. No peripheral logic circuits such as Wallace trees or complementers are needed in constructing the proposed modular multiplication networks. Speed analysis, hardware complexity, packaging, and application requirements of the proposed array multipliers are also provided.
Keywords :
Additive multiply modules; LSI arithmetic arrays; cellular array multipliers; computer arithmetic; multiplication networks; pipelined arithmetic design; two´s complement multiplication; two´s complement multiplication.; Computer networks; Digital arithmetic; Fixed-point arithmetic; Floating-point arithmetic; Hardware; Iterative algorithms; Large scale integration; Logic arrays; Logic circuits; Packaging; Additive multiply modules; LSI arithmetic arrays; cellular array multipliers; computer arithmetic; multiplication networks; pipelined arithmetic design; two´s complement multiplication; two´s complement multiplication.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1979.1675350
Filename :
1675350
Link To Document :
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