Title :
A 3-level asynchronous protocol for a differential two-wire communication link
Author :
Svensson, Christer ; Yuan, Jiren
Author_Institution :
LSI Design Center, Linkoping Univ., Sweden
fDate :
9/1/1994 12:00:00 AM
Abstract :
A differential two-wire communication link with a 3-level asynchronous protocol is introduced. The proposed 3-level code contains information of both data and clock. Since only one edge is needed for each bit, the bandwidth of a link is efficiently utilized. The power consumption is reduced by the low-swing differential two-wire link and is further reduced by a 3-level code. The speed of the protocol is expected to reach 1 Gb/s in a 1.2-μm CMOS process
Keywords :
CMOS integrated circuits; clocks; decoding; digital communication systems; digital integrated circuits; encoding; protocols; pulse-code modulation links; telecommunication links; 1.2 mum; 3-level asynchronous protocol; 3-level code; CMOS process; bandwidth; clock; data; differential two-wire communication link; low-swing differential two-wire link; power consumption; Asynchronous communication; Bandwidth; Clocks; Delay; Driver circuits; Energy consumption; Integrated circuit interconnections; Protocols; Transmitters; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
