Abstract :
Recently, an algorithm has been developed for deriving optimal NAND array realizations of complete Boolean functions [1]. The algorithm has two defects. It often requires a cumbersomely large amount of computations and does not handle incomplete functions. The short-cut method presented here is free from those defects.
Keywords :
Complete and incomplete Boolean functions; NAND arrays (optimal, near-optimal, and modified); NAND collector; NAND tree circuits; irredundant covers; tree forms (partial, complete, prime and nonprime); Boolean functions; Circuit topology; Integrated circuit technology; Logic arrays; Logic circuits; Network topology; Complete and incomplete Boolean functions; NAND arrays (optimal, near-optimal, and modified); NAND collector; NAND tree circuits; irredundant covers; tree forms (partial, complete, prime and nonprime);
