Performance of Cooperative Loosely Coupled Microprocessor Architectures in an Interactive Data Base Task

Continuing technological advances in single-chip intelligence and storage cell density, and in bulk store performance provide increasing opportunities to construct multiple microprocessor systems. The objective of this experimental study was to explore the performance of selected system architectures in a manner sufficiently detailed, quantitative and realistic to 1) contribute to our understanding of the fundamental behavior of such systems and 2) permit practical designs to follow from the results.