Title :
A Systematically Designed Binary Array Processor
Author :
Reeves, Anthony P.
Author_Institution :
School of Electrical Engineering, Purdue University
fDate :
4/1/1980 12:00:00 AM
Abstract :
A class of binary array processors (BAP) have evolved over the past 20 years primarily intended for image-processing applications. The advent of large-scale integrated-circuit technology makes the construction of these processors feasible. In this paper three basic instruction types that characterize a BAP are defined and the systematic design of a processor called BASE is described in detail. Two forms of BASE are discussed, a fully parallel version and an add-on unit for a conventional computer. The systematic design has enabled an assembly language with a simple, APL-like syntax to be developed. Several program examples to illustrate features of the processor are given.
Keywords :
Binary images; computer architecture; image processing; near-neighborhood operation; parallel processing; Array signal processing; Assembly systems; Computer architecture; Concurrent computing; Hardware; Image processing; Large scale integration; Parallel processing; Pixel; Process design; Binary images; computer architecture; image processing; near-neighborhood operation; parallel processing;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1980.1675566