DocumentCode :
1141910
Title :
Hardware architecture design of video compression for multimedia communication systems
Author :
Chien, Shao-Yi ; Huang, Yu-Wen ; Ching-Yeh Chen ; Chen, Liang-Gee ; Liang-Gee Chen
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Volume :
43
Issue :
8
fYear :
2005
Firstpage :
122
Lastpage :
131
Keywords :
VLSI; computer architecture; data compression; multimedia communication; video coding; 30 Hz; H.264 standards; MPEG-4; VLSI realization; hardware architecture design; hardware solutions; real-time multimedia communications systems; single-chip encoder; video coding algorithms; video compression algorithms; Application specific processors; Communication standards; Frequency domain analysis; Hardware; MPEG 4 Standard; Multimedia communication; Multimedia systems; Quantization; Video coding; Video compression;
fLanguage :
English
Journal_Title :
Communications Magazine, IEEE
Publisher :
ieee
ISSN :
0163-6804
Type :
jour
DOI :
10.1109/MCOM.2005.1497562
Filename :
1497562
Link To Document :
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