Title :
The Weighted Syndrome Sums Approach to VLSI Testing
Author :
Barzilai, Zeev ; Savir, Jacob ; Markowsky, George ; Smith, Merlin G.
Author_Institution :
IBM Thomas J. Watson Research Center
Abstract :
With the advent of VLSI, testing has become one of the most costly, complicated, and time consuming problems. The method of syndrome- testing is applicable toward VLSI testing since it does not require test generation and fault simulation. It can also be considered as a vehicle for self-testing. In order to employ syndrome-testing in VLSI, we electronically partition the chip into macros in test mode. The macros are then syndrome tested in sequence.
Keywords :
Partitioning; Syndrome-testing; self-testing; syndrome-testable design; Built-in self-test; Circuit faults; Circuit testing; Counting circuits; Digital circuits; Electronic equipment testing; Jacobian matrices; Logic testing; Vehicles; Very large scale integration; Partitioning; Syndrome-testing; self-testing; syndrome-testable design;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1981.1675744