Highly scalable saddle MOSFET for high-density and high-performance DRAM

We proposed an MOS device structure with a recess channel and side gate, and characterized key features of the device through three-dimensional device simulation for the first time. Device characteristics with recess depth and source/drain doping were carefully investigated in terms of the threshold voltage (V_th), off-state leakage current (I_off), subthreshold swing (SS), and drain-induced barrier lowering (DIBL). The saddle MOSFET showed less V_th sensitivity with the recess depth and at least 10³ times higher I_on/I_off than conventional recess channel MOSFET. It was also shown that maximum lightly doped drain doping to guarantee I_off less than 1 fA is about 1.5×10¹⁹ cm^-3.