DocumentCode
1151610
Title
Instruction Cache Replacement Policies and Organizations
Author
Smith, James E. ; Goodman, James R.
Author_Institution
Department of Electrical and Computer Engineering, University of Wisconsin-Madison
Issue
3
fYear
1985
fDate
3/1/1985 12:00:00 AM
Firstpage
234
Lastpage
241
Abstract
Instruction cache replacement policies and organizations are analyzed both theoretically and experimentally. Theoretical analyses are based on a new model for cache references —the loop model. First the loop model is used to study replacement policies and cache organizations. It is concluded theoretically that random replacement is better than LRU and FIFO, and that under certain circumstances, a direct-mapped or set-associative cache may perform better than a full-associative cache organization. Experimental results using instruction trace data are then given and analyzed. The experimental results indicate that the loop model provides a good explanation for observed cache performance.
Keywords
Cache memories; direct-mapped; fully associative; loop model; memory organization; replacement algorithms; set-associative; Bandwidth; Cache memory; Computer aided instruction; Data analysis; Decoding; High performance computing; Large-scale systems; Prefetching; Protection; Cache memories; direct-mapped; fully associative; loop model; memory organization; replacement algorithms; set-associative;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1985.1676566
Filename
1676566
Link To Document