Interface state creation and charge trapping in the medium-to-high gate voltage range (Vd/2⩾Vg⩽V d) during hot-carrier stressing of n-MOS transistors

The conditions of hot-carrier stressing of n-MOS transistors have been studied in order to investigate the types of damage arising from the stressing in the gate voltage range V_d/2⩾V_g⩾V_d . Although a maximum in the V_t degradation is seen at V_g=V_d/2, considerable stress damage occurs at higher gate voltages (at and around V _g=V_d). This stress damage obeys a different power law as a function of time than that which is seen at V_g=V_d/2. Examination of the damage using dynamic stress experiments and alternate static injection phases suggests that the oxide-trapped charge (N_ox) is mostly responsible for the damage at V_g=V_d, whereas the degradation at V_g=V_d/2 arises from the interface state (N_ss) creation. An examination of the gate current conditions shows that the oxide traps are created under conditions of maximum electronic gate current, suggesting that the hot electrons are responsible for the damage. Analysis of the time evolution of the damage suggests that the two types of damage (N_ox and N_ss) can be seen during a single stressing, depending on the stress voltage conditions