DocumentCode :
1153768
Title :
Electrical test structure for measuring polysilicon-to-active mask misalignment
Author :
Syrzycki, Marek
Author_Institution :
Simon Fraser Univ., Sch. of Eng. Sci., Bumaby, BC, Canada
Volume :
26
Issue :
14
fYear :
1990
fDate :
7/5/1990 12:00:00 AM
Firstpage :
1009
Lastpage :
1012
Abstract :
An electrical test structure which allows accurate measurement of the misalignment vector between polysilicon and active region patterns in MOS technology is described. Due to its small size and simplicity, the structure can be useful for misalignment mapping and for statistical characterisation of polysilicon photolithography processes.
Keywords :
MOS integrated circuits; VLSI; displacement measurement; integrated circuit technology; lithography; masks; IC technology; MOS technology; VLSI; electrical test structure; mask misalignment measurement; misalignment mapping; misalignment vector; operation; polysilicon photolithography processes; polysilicon-to-active mask misalignment; statistical characterisation;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19900654
Filename :
107984
Link To Document :
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