Cryogenic performance of a CMOS 32-bit microprocessor subsystem built on the silicon-substrate-based multichip packaging technology

The performance improvement of a cryogenic CMOS 32-bit microprocessor subsystem built on the newly-developed silicon-substrate-based multichip packaging technology is reported. An 80-100% performance improvement is obtained when the supply voltage is between 4.00 and 5.25 V. The percentage of performance improvement begins increasing when the supply voltage is below 4 V. An approximately 140% performance improvement is observed at a supply voltage of 3.25 V. The percentage of performance improvement of a complicated, real subsystem operated at liquid nitrogen temperature depends on the supply voltage. A small size, high speed, high integration system, packaged on a silicon substrate and operated at liquid nitrogen temperature is possible.