DocumentCode
1162024
Title
Bounds on signal delay in RC mesh networks
Author
Chan, Pak K. ; Schlag, Martine D F
Author_Institution
California Univ., Santa Cruz, CA, USA
Volume
8
Issue
6
fYear
1989
fDate
6/1/1989 12:00:00 AM
Firstpage
581
Lastpage
589
Abstract
The linear RC delay model is commonly used in timing simulators for MOS digital circuits. Most simulators only handle tree networks, not arbitrary networks. More precisely, these simulators treat all networks as if they were trees. Currently, the only alternative is to invert the node-conductance matrix of the RC network numerically. Upper and lower bounds on signal delays in general RC networks are derived. The idea is to bound (element-wise) the inverse of the node-conductance matrix of the network, and use these bounding matrices in formulas for estimating signal delays in RC networks. Evaluating the bounds requires finding the least-resistance paths and the maximum cut between the input mode and the rest of the nodes in the network. For tree networks, the bounds coincide and are the same as those found by using a method due to P. Penfield, et al. (1970)
Keywords
circuit analysis computing; delays; graph theory; linear network analysis; matrix algebra; network topology; MOS digital circuits; RC mesh networks; bounding matrices; least-resistance paths; linear RC delay model; lower bounds; matrix inversion; maximum cut; node-conductance matrix; signal delay; timing simulators; upper bounds; Capacitance; Capacitors; Circuit simulation; Computational modeling; Delay estimation; Delay lines; Digital circuits; Intelligent networks; Mesh networks; Timing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.31514
Filename
31514
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