Generation of processor interface for SoC using standard communication protocol

System-on-chip synthesis is not a straightforward process; it brings new challenges including the necessity of intellectual property (IP) reuse to shorten the design time. The necessity for the rapid integration of communication logic between modules illustrates the importance of communication synthesis. In the following article, the goal is to allow flexibility and rapid integration of communication mechanisms by using a standard communication protocol, the VSIA´s Virtual Component Interface. The development of a complete SoC methodology is proposed that can be viewed as a good compromise between the two well-known approaches: platform based and IP assembly. The approach is to integrate (reuse) configurable IP modules into a platform that is based on a particular OCB. To reach these goals, a generic interface for an ARM7 processor is developed. This interface provides many communication and synchronisation mechanisms to meet different application needs. Emphasis is given to the performance analysis of the BVCI protocol in multiprocessors and hardware/software implementation. Three applications are used for testing the interface: a pattern matcher, a Reed-Solomon decoder and a dual-processor quick sort. Architectures for efficient protocol conversion and efficient use of the VCI protocol are explored. Performance of ARM7-to-VCI and memory-to-VCI protocol conversions are measured. In addition, the interest of configuration principle use in SoC methodologies is evaluated.