A current memory cell with switch feedthrough reduction by error feedback

Author

Pain, Bedabrata ; Fossum, Eric R.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

Volume

29

Issue

10

fYear

1994

fDate

10/1/1994 12:00:00 AM

Firstpage

1288

Lastpage

1290

Abstract

A new switch feedthrough suppressing current memory cell, capable of accurately memorizing low current levels is presented. The scheme operates by feeding back a fraction of the error current to the storage node whose voltage is adjusted so that the error is reduced to zero. Using the feedback compensation scheme, absolute current error of less than 0.1% was achieved even at ultra-low current levels of 10 nA. The negative feedback circuit consumes negligibly low power and can be laid in a very small area. With this scheme, memory accuracy is traded for error correction speed, a feature common to all feedback-based switch feedthrough reduction schemes. The feedback compensated current memory cell can be used for low-power high-background infrared focal-plane readout electronics featuring in-pixel background suppression

Keywords

CMOS integrated circuits; cellular arrays; error compensation; infrared imaging; switched networks; 10 nA; absolute current error; current memory cell; error correction speed; error current; error feedback; feedback compensation scheme; infrared focal-plane readout electronics; negative feedback circuit; storage node; switch feedthrough reduction; Error correction; Feedback circuits; Mirrors; Negative feedback; Pain; Readout electronics; Space technology; Switches; Switching circuits; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.315216

Filename

315216